Layout design data must be corrected to compensate for image errors due to light diffraction or process effects. OPC refers to a resolution enhancement technique utilized to change a mask pattern in order to maintain the integrity of the original design. FIG. 1 illustrates a conventional repair flow 100 utilizing separate OPC and optical rule check (ORC) processes for optical verification. The input to the repair flow 100 is a binary layout design data (e.g., GDSin). A retargeting (e.g., global bias correction) is first performed (step 101). Following the retargeting, dummy pattern or assist feature enhancements are made to the layout design data (step 103). Next, isolated or nested patterns in the layout design data are corrected for selectivity bias (step 105). In step 107, an OPC process is executed to generate the output layout design data 109 (e.g., GDSout). If the output layout design data 109 fails to satisfy an optical verification process (step 111), the output layout design data 109 or the OPC process recipe is modified offline (step 113) and fed back into the repair flow 100 for another iteration of steps 101 through 111. The optical verification process in a conventional repair flow typically utilizes critical dimension (CD) as a measure of the output quality.
The repair flow 100 is expensive in terms of both computing resources and processing time. Layout designs can be very large, running into the gigabytes. Performing an OPC process even once on a design is computationally intensive. Repeating the OPC process to correct remaining potential print errors adds significant time to finalize the layout design. In addition, it is well known that CD is an insufficient measure when determining potential errors in the layout data. This is especially true for off-nominal process conditions.
A need therefore exists for a high quality and efficient repair flow methodology and apparatus that reduces OPC overall cycle times.